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| TMS320C6415-600MHz | - 128Kb L1D Data Cache; - 128Kb L1P Program Cache - 8Mb L2 Cache - Twenty-Eight Operations/Cycle - 4800 MIPS |
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| FPGA | - 2 Altera CycloneTM EP1C3 |
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| MEMORY | - 128 MB SDRAM 133MHz. - 2 MB Flash Memory |
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| Video IN | - Four multiplexed inputs. - CVBS, Y/C, PAL, SECAM, NTSC. - LVDS |
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| Video OUT | - XVGA up to 1280x1024. - Simultaneous Hardware Cursor and Pop-up Window. - 2D Graphics Accelerator |
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| Analog I/Os | - 8 channel inputs. - 4 channel outputs. - Sample rate: 133KHz |
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| External ports | - USB 2.0 Host Controller - USB 2.0 Device Controller - 10/100 Base T LAN - RS232 Serial Port - XDS510 J-TAG |
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| Expansion ports | - TI Daughter card (SPRA711) - PCI - Isolated digital I/O - 4 Dip switch - 4 User led |
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The software engineer has to write pieces of code in response to events the most important of which is the acquisition of a new image in the input buffer. This event starts the main part of the software, where the video processing algorithms are implemented. |
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The user can easily create and customize the GUI-objects for a specific application.
- Playback Window
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| Doc 01 | Download |
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| Doc 02 | Download |
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